Intel faces another 820 chip set snafu

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Intel faces another 820 chip set snafu Problem-plagued set is coming under attack again, this time by frustrated users reporting its failure to work with SDRAM By Ken Popovich PC Week ZDNN April 12  Intel Corp.s problem-plagued 820 chip set is coming under attack again, this time by frustrated users reporting its failure to work with synchronous dynamic RAM. But Intel says the blame resides with memory makers who are producing sub-standard components.

HOWEVER, AN OFFICIAL with at least one major synchronous dynamic RAM (SDRAM) maker contends the fault lies with the 820, not the memory. In recent months, 820 users have contacted Intel to report a number of failures involving the chip set when packaged with SDRAM. While the 820 was designed to be used with Rambus direct RAM, the chip set is currently packaged more often with SDRAM. During the first quarter of this year, more than 80 percent of the 820s shipped were packaged with SDRAM, according to International Data Corp. of Framingham, Mass.

Following up on reported problems, Intel said it discovered that the trouble stemmed not from the chip set but from the failure of memory makers to include a key component with the memory modules or else program the component correctly.

THE COMPONENT PROBLEM

Troubles involving the 820 arise when the memory translator hub, which is added to the chip set to enable it to work with SDRAM, seeks to query the memory modules by connecting with a component called an SPD (serial presence detector). The component, found on SDRAM DIMM modules that meet PC100 industry standards, stores information on the size, speed, voltage, and row and column addresses of the memory chips.

Intel said that memory makers, in order to lower their costs, are leaving off this component, a type of EEPROM (electronically erasable programmable read-only memory), or memory chip, that can store information without power.

Without the SPD, the 820 is unable to utilize the memory modules, making them useless.

A couple of things happened. Either the vendors didnt put on the SPD or they didnt program it with the right information on the true nature of the DIMM, said Sunil Kumar, product marking manager in Intels Platform Components Division. So when the translator tries to read and understand what kind of memory modules there are, it is either getting the wrong data or no data at all.

But getting SDRAM manufacturers to address the issue isnt easy, Kumar said. The non-compatible DIMMs are available from many of the 200 manufacturers out there.

Intel also is hoping to get the word out by contacting motherboard manufacturers so that they can further inform their customers of the need for SPD. I BEG TO DIFFER

But an official with one SDRAM manufacturer derided Intels explanation.

I dont buy that. I think that if people were having problems with the SPD or improper coding it would affect every chip set, and not just the 820, the official said, speaking on the condition that his name not be used.

The official also said he doubted that many SDRAM makers are failing to include the SPD. I dont know of anyone whos making these modules without an SPD. There are too many systems out there that wont boot if you dont have an SPD. More 'Goofs and Glitches' Bugs, viruses, attacks, vulnerabilities, hacks The problem, the official said, is most likely the BIOS that ships with the chip set.

Theres no clear standard on what the contents of the SPD are supposed to be, the official continued. Its really a function of the BIOS. If the motherboard is looking too closely at whats supposed to be in the SPD contents, then Id say its the fault of that BIOS on the motherboard.

Intel said it studying possible workaround solutions that could involve tweaking the BIOS.

The reason the problem with the SPD hasnt arisen before the 820, Intels Kumar said, is because Intels popular BX chip set didnt require the component. But with the future-generation platforms, its a requirement, he said.

In particular, the 820 is a more complex chip set than the BX, said Peter Mueller, an applications engineer at Intel.

Because of the fact that we have a translator hub out there, its like another level between the actual memory controller and the DRAM, so youve got an extra chip in there, Mueller said.

Addressing the problem, which basically boils down to a sub-standard DIMM, isnt easy, he said. The only option you have, which will cost you performance and still may result in instability, is you program some default set of values (into the BIOS). You default to the slowest speeds, the lowest-common-denominator sort of idea, but of course youre giving up some potential performance, Mueller said. A HISTORY OF PROBLEMS Intels 820 chip set already suffers from a tainted image. Beginning with its twice-delayed introduction last fall, the 820, Intels first chip set to support Rambus-based memory, has come under considerable scrutiny.

After delaying the initial launch, Intel in September cancelled the unveiling once again, this time only a day before its official launch after it was unable to resolve a problem involving the use of three memory slots for RDRAM.

Eventually, the company decided the best way to address the problem was to make two slots available for RDRAM, restricting systems to only 512MB of RDRAM.

In February, Intel acknowledged another 820 problem involving the memory translator hub with error-correction coding that resulted in corrupt data. The discovery of the problem spurred the chip maker to scrap plans for three server motherboards based on the chip set. http://www.msnbc.com/news/394061.asp#BODY



-- Carl Jenkins (Somewherepress@aol.com), April 12, 2000

Answers

The last paragraph carries the meat of this story, as far as I am concerned. The memory translator hub with error-correction coding that results in corrupt data.

Talk about counter-productive. This makes no sense at all.

-- Wellesley (wellesley@freeport.net), April 13, 2000.


And, note, this data corruption problem was discovered in February. Now there's a y2k link if ever I saw one.

-- Billiver (billiver@aol.com), April 13, 2000.

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